Optimization of selective harmonic elimination technique for cascaded multilevel inverter

Abstract

Multilevel inverters have been gaining research interests for medium and high-power applications. The parameters of research interest are minimum distortion and high performance and the possibility to function at lower switching frequencies. Generally, power inverters are employed for the photovoltaic energy systems because they can produce the desired AC voltage waveform from low DC signal. The ideal output waveform of multilevel inverter is a pure sinusoidal signal. However, practically the output waveform of the multilevel inverter is in the staircase shape and is always associated with unwanted harmonics, affecting thus the ultimate output considerably. Total Harmonic Distortion is usually used to measure the quality of the output signal. Total Harmonic distortion should be kept to a minimum in DC-to-AC inverters. To reduce the effect of Total Harmonic Distortion (THD), Selective Harmonic Elimination (SHE) technique is used, which is related to triggering of switches in H-bridge inverter in such a sequential manner such that low-order odd harmonics are automatically eliminated. The undesirable odd harmonics can be eliminated by having optimized the switching angles in the SHE signal. These switching angles can be obtained by calculating a set of nonlinear equations using Selective Harmonic Elimination (SHE) technique. In addition to the modulation index, the duty cycle is considered the most important parameter used to control the magnitude of the fundamental output voltage for multilevel inverters. By varying the value of the duty cycle and the modulation index the Total Harmonics Distortion (THD) will also change. Another substantial issue in the output signal of the multilevel inverter is that due to harmonic spikes. These spikes have got undesirable damaging effects, such as harmonic heating, and switching losses by the semiconductor devices. Also, simultaneous switching of IGBTs can generate high voltage with high time-dependent change in voltage of the output terminal of the inverters. This high voltage spike may easily damage the IGBTs. To address these issues, a new Optimization Harmonic Elimination Technique (OHET) based on SHE scheme is proposed to minimize Total Harmonic Distortion (THD). Besides, suppressing harmonic spikes by improving the gate driver circuit of the full-bridge inverter is proposed. The technique shows how the high-order harmonics resulting from harmonic spikes are suppressed alongside minimizing THD. The performance of a seven-level H-bridge cascade inverter is evaluated using PSIM and validated experimentally by developing a purposely built microcontroller-based printed circuit board. The value of THD of simulation and experimental results before applying the optimization technique of 15.21% and 13.17%, respectively. However, the THD has been reduced after using the optimization technique to 12.9% and 11.16%, respectively. The so obtained simulation and experimental results are in complete agreement under identical circuit operating conditions. The experimental results are showing resistive-loaded inverter performing better than that of an inductive loaded inverter.